Stan Meyers Digital Control Means
WOW WOW NEW 2021
Now we have master the Digital Control means and merged it with a TPS sender board replacing the K7
This means just plug board into the GMS Matrix main board and connect your throttle position lead and you going !!!!
OOOH YEAH BABY Thank you SECURE SUPPLIES !!!!!!!!!!!!
This circuit has two pots, one for adjusting the primary coil voltage amplitude and another for adjusting the pulse voltage amplitude of the pulsing during the 'Gate' time.
There are four options for driving the primary coil.
1. Gate time high-Current flows through primary coil during gate time
2. Gate time low-No current flowing through primary coil during gate time
3. Variable pulse voltage amplitude during gate time (via P2)
4. Continuous pulse frequency
Both high (resonant) and low (gate) frequencies are provided by a FeelTech function generator which provides independent frequency, duty cycle, and sweep functions. The drive circuit, function generator and VIC coil are all powered by a Ryobi 18V battery and a programmable power supply as seen in previous videos. Here you can get the Multisim and image file/schematic
BradK-Hybrid VIC Driver-April 2020.ms14 - 211.53 kB, downloaded 6 times.
Explanation of the circuit I made to get variable amplitude pulsing during the 'Gate' time. In this video I stated I made this circuit for the PLL but forgot I actually made it after Ronnie (GPSSONAR) mentioned it was necessary to get the cells working.
I'm going to be building this circuit again and I'll start running tests on it, once I get it working I'll probably make a PCB and if all goes well I'll share it here and on the forums.
I forgot to mention but for the HF and LF pulsing I use a dual channel frequency gen that has adjustable duty cycle and bias as well as a sweep function. With this setup the circuit is adjustable in every way needed.
Extremely Important Note
The Following Explains how the inital interconnect work on the vic matrix
Can you tell a bit more on what point (M, M1, J, A) connnections
in the circuits the yellow and
blue (duty-cycle) scope traces are measured showing in your video?
I think I know, but I'm not sure...
yellow is (to primary coil TX1) and blue (M, M1)?
They is one (J) output from the analog voltage generator that is connected to the digital control means card.
That is the signal that you see going up and down.
They are several outputs of the J signals that comes out the Digital control Means board.
If you look at Stan's actual Digital control means card you will see it has i think 4 or 5 (J) outputs on it, that goes out to different circuits.
One (J) goes to the voltage amplitude for the primary.
Some of the J outputs goes to other cards.
The (M) on the digital control means card is the signal that is fed into the analog voltage generator which produces the J signal.
(M1 through M4) goes to the injector cards which is the signal that you see going back and forth which controls the injection (on) time and other things.
the yelow scope signal comes from the analog voltage generator which is tided to digital control means,meaning build everithing just for a simple offset.Anyway I managed to ''foul''the J input by buildind a voltage devider coming in the J input,Without that the ''gain pot'' is locked.Dont know why but the offset pot is adjusting the voltage from 2v to 11.45v,and the gain pot is adjusting the same voltage but in a short range of 2v.How your circuit works ?
which pot does what?
The digital control means board has nothing to do with (J) it only has 5 additional outputs on it from the analog generator board. The analog board sets on top of the digital board. In other words one J output from the analog board, and that one output is fed to 5 pins on the digital board as outputs. Like the photo below.
REPLACES k7 with direct connect to tps sensor
VIC sequential firing
the idea with the sequential firing is that for every edge transition, both on the leading and on the trailing edge of the main operating frequency, one of four transistors are cut off, thus discharging it's associated transformers stored primary energy into the secondary, which in turn feeds the WFC through it's diode, all along the way as the other three transformers primaries are being charged, which means that three transformers are continously fully loaded and ready to fire when the time comes.
i still need to tune the transformer
the frequency gen is ready, plenty of tuning i have there and the power supply is done.
which could mean that at the correct frequency the natural ringing/oscillating of the secondary circuit will be enhanced regardless of which one of the transformers that's being discharged, only this time by a factor of 4, thus enhancing the stepcharge accordingly.Having seen the cells being attached in series on Meyer's own WFC I can't help but wondering if his VIC's were controlled this way, by firing 1 VIC while the rest of them were being charged.Why else the need of 10-11 VIC's if all the cells are connected in series?
Re the Sensor tps videos above showing scope shots
There is definitely a change in the gate size in both videos. You can see the voltage change in second video.
Do you know what is the source of the voltage signal. The 74122N in K3 The Gated Pulse Frequency Generator is core the Videos of the sensor working on scope above
controlled by voltage level. Interesting that frequency is in 40hz to 50hz range which is what I would expect for the M signal.
I tried to take a look at what varying the gate would do to the analog signal. Thought it would be easy to do with my test setup as connecting wires are not soldered but in screw terminal on each board. What I did was connect the analog input to the output of the the gate board. That input was at 41.67hz just like the the output of K2 I even set it to 50 duty cycle. No signal out of analog generator board.
Reason input voltage level from gate board was 3.8v including a slight voltage offset from zero. Input from K2 is a solid 5V square wave. Looks like analog board needs at least a 5v signal to get through the first stage amplifier.
Have been thinking about how to test a signal with a greater than 5V pulse to see what that would do to analog signal. Still have not figured that one out some of this testing would sure be easier if I had a signal generator. I have thought about buying one several times but have always come up with another way to do things.
Actually I have an easy way to raise the voltage level of the pulse I already did that when I changed the gate from 5v logic to 12v logic to solve logic level miss match in the resonance circuit which I did using the first to amps and resistor values from the K8 circuit.
While raising voltage will work it does not make sense when M and M1 come out of the Digital Means cards as the 7408 and other logic chips on output are at 5 volt logic levels and will always put out a 5 volt signal.
They will pass the signal with gate changes with no problem they will not pass voltage level changes. I knew that when I was looking at this when a started building circuits. Is to forget as chip supply voltages are usually left off circuit diagrams
I wonder if the limits checks in this circuit are left over from an earlier use. I did a check to see what would happen to signal to transformer if I raised the lower limit offset. There was no change in signal levels to primary. Changing gain or offset on VIC front panel did have an effect.
Reason I have been checking these things as Ronnie talks testing at 2, 4, 5,8,10, 11+ voltage and making adjustment and I have always wondered where he set the voltage. I can do that with gain setting on VIC but I do not see any place else to do that in circuits I have built.
I used a lm 2917, Here is a circuit I made years ago.
The output from the f/v generator pulls down the c/v pin on the 555 adjusting the duty cycle of the 555 gate timer based on engine rpm. (crankshaft sensor) 555 used to simulate.
I was counting the pulses, but you do not have to. An edge trigger off the frequency output can trigger the gating monostable also, eliminating the 4017.
p.s. ..Figure it out yourself. Do not rely on gatekeepers for info, none of it is correct.
That circuit is designed to keep the number of pulses to each gated pulse the same regardless of the frequency. So, whatever frequency you set it at you get the same number of pulses in the train. In the scope of things it really does not matter. All you need is the output going to the vic transistor from the f/v converter.
I guess it depends on how you define pulses. Both the analog and digital wave trains are in sync as they are fed from same source. Even the gate generator gets its input from this same source to keep them all in sync If you change the frequency of the input M you change the frequency of the gate signal. The digital high frequency is in each pulse as the gate control when it is created so it is always inside the gate pulse width. The bigger the pulse the more of the high frequency signal is included in the pulse.
Dan I did run the other test I talked about above. I fed the M input into analog generator in to the amplifier I used to raise 5 volt logic to 12 volt logic but I used a KM317 voltage regulator instead of straight 12v into circuit. The output of this amplifier was then fed into input of K8. I did not change anything else this let me control the voltage level of the signal into the K8. I initially set it voltage to 5v and check signal against the input to make sure they were the same. I then slowly raise the voltage out the KM317 (monitored with volt meter and with 0-scope on input to K8). I raised the signal input level as it went up to 8v there was no change to analog signal level output from K8.
Note: I was doing this test to see if a voltage level change on K8's input signal would affect K8's output and it does not appear to based on this test.
Looking at just K8 I can see what the idle setting does. There is a minimum level about 2.32 volts that needs to set to see the single without clipping. Seems to be a good setting from 10hz to 75hz. Above 75hz the gate function stops working. Below 10hz signal start to be clipped so if you go lower so minimum setting needs be raised to avoid clipping.
It is not clear what the is the function of the accel pot. The only place it seems to come into play is on the Cal value. If you switch to cal from run you can use the accel pot to set the voltage at a max level.
What I expect I may be missing is this pot may be used to set something back on the Digital Means card as the J signal is fed back though this card before going to the rest of the system.
At least with the trim pot I will not be changing the idle setting below the minimum value by accident. Did that below and wondered where my signal went.
NOTES 17 June 2021
I have updated the K8 test report and attached to end of my first post in this thread new report has K8 in title. When I did original testing I use a 50hz square wave as input, while the tests I conducted and reported still applies I missed the effect of having a variable width duty cycle in the input signal.
It turns out this has a major effect on the output signal as it changes the voltage offset in the range of 2 to 10 volts. The offset and gain functions described in original report still apply.
The updated report shows includes tests showing this effect. This variable duty width pulse is generated in the Digital Means Card (K11) which I used to do these additional test. I have also included a discussion on the symbol on the schematic that shows K8 is sync on the trailing edge of the [M] signal and why this is important.
Quick answer is this is needed to cause the voltage to rise with a larger duty cycle pulse and to cause the analog wave to cross zero in the position direction at the start of the gate pulse.
This is done by using the [M4] signal from K11 as the leading edge of [M4] is the trailing edge of [M]. This is true because [M4] is the inverse of [M] and the are in sync.
As [M] is is use to generate the gate and the gate is use use to generate the Digital signal that means the analog wave will be in the proper location in the pulses sent to VIC coils.